A conventional capacitance touch panel comprises a waveform generator and a capacitance digitizing apparatus. The waveform generator generates an oscillating square wave signal with a corresponding period according to equivalent capacitance of each row of capacitors. The capacitance digitizing apparatus generates a corresponding digital value according to the period of the foregoing oscillating square wave signal. Therefore, the digital value represents the equivalent capacitance.
FIG. 1 shows a schematic diagram a conventional waveform generator. A conventional waveform generator 120 comprises two current sources IDAC1 and IDAC2, an operational amplifier (Op-Amp) 121 and a comparator 122. The current sources IDAC1 and IDAC2 provide appropriate currents, and each row of capacitors (in directions of axis X1 to Xn and Y1 to Ym) on the capacitance touch panel is cross-coupled between a negative input end and an output end of the Op-Amp 121 to form an oscillating circuit, such that the Op-Amp 121 outputs a triangular wave signal, which is processed by the comparator 122 to generate an oscillating square wave signal OW. Thus, a period of the oscillating square wave signal OW represents sensed capacitance.
In related fields, two approaches are commonly used for digitizing a capacitance value. The first approach is to perform an analog-to-digital conversion by an analog-to-digital converter (ADC) to directly convert an analog capacitance value to a digital capacitance value. The second approach is a period counting approach, in which a period TOW of an oscillating square wave signal OW is calculated according to a period number PC of a reference clock SC with a known period TSC. Taking FIG. 2A as an example, the period number PC, of the reference clock SC, for calculating n periods TOW of the oscillating square wave OW is r according to the reference clock SC. Therefore, the period TOW of the oscillating square wave signal OW is represented by TOW=TSC×r/n, and a corresponding digital capacitance value is generated according to a predetermined relationship between an equivalent capacitance value and the period TOW of the oscillating square wave signal OW. For example, in a conventional waveform generator, capacitance is directly proportional to the period TOW of the oscillating square wave signal OW.
Generally speaking, the distance between adjacent capacitors on a capacitance touch panel is about 5 mm to 6 mm; however, higher coordinate resolutions are desired in various applications. At this point, a conventional arithmetic unit usually implements a following interpolation formula to calculate coordinate values.
            α      x        =                            ∑                      i            =            1                    n                ⁢                  i          ×                      x            i                                                ∑                      i            =            1                    n                ⁢                  x          i                      ,            α      y        =                            ∑                      i            =            1                    m                ⁢                  i          ×                      y            i                                                ∑                      i            =            1                    m                ⁢                  y          i                    
Referring to FIG. 2B, suppose that a user touches a position α to result in a change of capacitance of only two capacitors, a coordinate of the position α obtained according to the foregoing interpolation formula is represented as:
  α  =                    x        1            +              2        ⁢                  x          2                                    x        1            +              x        2            
When the coordinate resolution is required to be 1/64 of the distance between adjacent capacitors (e.g., the distance between adjacent capacitors is divided into 64 parts). it is calculated as:
            ⇒                                    x            1                    +                      2            ⁢                          x              2                                                            x            1                    +                      x            2                                =          1      +              n        64              ,          ⁢            n      ∈                                    N            ⁢                                                  ⁢            and            ⁢                                                  ⁢            1                    ≦          n          ≦          63                ⁢                                  ⇒                              x            1                                x            2                                =                                        64            -            n                    n                ⁢                                  ⇒                              x            1                                x            2                              =              {                              63            1                    ,                      62            2                    ,                      63            3                    ,          …          ⁢                                          ,                      1            63                          }            
Therefore, when the coordinate resolution is required to be 1/64 of the distance between adjacent capacitors, a bit width of x1 and x2 has to be more than 7 bits. Experimental statistics show that, the capacitance changes about 2% as a result of the user touching the capacitance touch panel. Taking a worst situation of 1% capacitance change for example, 27÷1%=12800≈214. Accordingly, as far as the period counting approach is concerned, it is necessary that the period value PC has a bit width of as high as at least 14 bits.
In practical applications, a coordinate resolution of a capacitance touch panel is determined according to a resolution of capacitance digitalization. For a system that demands a higher capacitance resolution, a high-resolution (a high bit-count) ADC is not only costly but also difficult to implement when applying the foregoing ADC for capacitance digitalization. However, supposing the foregoing period counting approach is adopted for capacitance digitalization, a sampling clock (a reference clock signal SC) with a higher frequency and a longer sampling period is also need, meaning that the system needs more power consumption and a longer response time. In order to solve the foregoing problem, the present invention is provided.